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Author Topic: Question: Exact computation of magloop capacitive match?  (Read 3472 times)
JAHAM2BE
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« on: November 23, 2014, 11:31:22 PM »

I'm planning on building an Army Loop tuner to allow experimenting with various medium-sized transmitting loops (~0.25 lambda). The schematic is as follows:

http://homepage.ntlworld.com/g4kki.william/army_loop_tuner.htm


I've been trying, unsuccessfully, to figure out exactly how to compute the required value of the matching capacitor C1.

I tried following the math at the following page under the section titled "2.5.1 Reactive Capacitive Match Using Impedance 'Transformation QT' Procedure":

http://ian.r.scott.tripod.com/antenna.htm

On the above page, the author presents a similar-looking capacitive matching circuit, using two matching capacitors in a balanced arrangement instead of one matching capacitor. The author also presents a strategy for computing the required matching capacitors Cs1 and Cs2. I simulated this in LTspice and got a vaguely-correct-looking result (almost zero reactance and ~80 ohms resistance at somewhere around 31 MHz), but the result was not exactly the same as the article's computations (which should give zero reactance and exactly 50 ohms at exactly 30 MHz).

Anyway, I'm not interested in the above balanced capacitive matching scheme using two matching capacitors, but am instead interested in the unbalanced (and more common) capacitive matching scheme, using only one matching capacitor, as shown in the first schematic at the top of this post. I attempted to apply the same analysis techniques but again am getting only vaguely-plausible results. I'm not sure I'm analyzing/modeling/interpreting the problem correctly, or what the expected X-vs-f and R-vs-f graphs of the matched loop should look like around the resonant frequency.

Rather than continue along what might be a blind alley, I thought I'd ask for help on how correctly to model the unbalanced single-matching-capacitor scheme in LTspice, in particular how properly to observe in LTspice the feedpoint X and R and what the expected shape should be. Then, I'd like to know how properly to compute analytically the required single matching capacitor in the unbalanced case (similar to the above derivation for the related case of using 2 matching capacitors).

I want to simulate this before building the physical tuner because I want to understand exactly what range of loop inductances can be matched for a given tuning capacitor and matching capacitor, which will have limited tuning ranges.

I realize this is a rather complex question, but would appreciate any advice. Thanks in advance.
« Last Edit: November 23, 2014, 11:39:52 PM by JAHAM2BE » Logged

JAHAM2BE
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« Reply #1 on: November 24, 2014, 01:44:18 AM »

Here is an LTspice simulation I ran that looks like a reasonably correct simulation of the capacitive loop match. Are my model and results correct? I chose Rrad and Rloss arbitrarily. R1 and R2 represent tuning capacitor loss. Matching capacitor C3 is assumed for now to be lossless.

I'm driving the loop through the matching capacitor with a 1 amp current source. Then, by observing the complex voltage at the driven end of the matching capacitor, my understanding is that we can obtain the complex impedance visible at the driven end of the matching capacitor (since V=IZ and I=1, V=Z).

The circuit and obtained complex impedance are as follows. The solid line represents the resistive component R, while the dotted line represents the reactive component X.



The resistive and reactive parts of the impedance vary hugely, but zooming in on the graph it can be seen that there is a frequency where X is approximately 0 and R is approximately 50 indicating the capacitive match C3 seems to be working as expected:



So, to rephrase my questions from my first post, in the context of the above simulations:

1. Are there errors in my above simulations? One thing that seems rather suspicious is that the frequency where X=0 and R=50 does not appear to be the resonant frequency of the tank, so there may be a fundamental error in my model.

2. How can we compute the required value of C3? I obtained it in the above simulation by trial and error.

----

A 4nec2 simulation of a similar antenna seems to show a similar impedance graph, so maybe my LTspice simulation isn't completely wrong:

« Last Edit: November 24, 2014, 02:48:08 AM by JAHAM2BE » Logged

WB6BYU
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« Reply #2 on: November 24, 2014, 08:58:02 AM »

The first problem is that the circuit you are modeling is not the original "Army Loop" tuner
as developed by KH Patterson at the US Army Limited War Laboratory in the 1960s.  The
original had all three capacitors in series across the loop, with the coax connected across the
center capacitor.

The original circuit was much easier to analyze:  the combination of all three in series tuned
the loop to resonance, while the inner one (which was much larger than the others) provided
a shunt reactance (beta match) to set the impedance at resonance.  Because the matching
capacitor is much larger than the others, it has relatively little effect on the resonant frequency.

The original circuit, however, can't be built with a standard split-stator capacitor:  it requires
that both sections of the tuning capacitor be insulated from each other.

This particular circuit has been modified to use a conventional split stator capacitor, but is more quirky.
I think you would have to analyze it as a parallel-tuned loop using the split stator capacitor, with a
step-up L network (series capacitor and shunt inductor) from the 50 ohm point to the high impedance
at the connection between the loop and the tuning capacitor.  That means that the loop has to be
tuned slightly off frequency to provide the required inductive reactance for the step-up network.
(The same is true of the original version, but because it was series fed the beta match was a step-down
L network instead of step-up.
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JAHAM2BE
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« Reply #3 on: November 25, 2014, 06:08:44 PM »

This particular circuit has been modified to use a conventional split stator capacitor, but is more quirky.
I think you would have to analyze it as a parallel-tuned loop using the split stator capacitor, with a
step-up L network (series capacitor and shunt inductor) from the 50 ohm point to the high impedance
at the connection between the loop and the tuning capacitor.  That means that the loop has to be
tuned slightly off frequency to provide the required inductive reactance for the step-up network.

Thanks. While I haven't yet figured out how to derive a closed-form expression for the required matching capacitance, your analysis helps greatly in understanding how the circuit is supposed to work. The bit about tuning the loop off-frequency to provide the required inductive reactance for the step-up L network makes a lot of sense and explains the often-mentioned, but seldom-explained, interaction between the tuning capacitor and matching capacitor.
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WX7G
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« Reply #4 on: November 26, 2014, 06:04:05 AM »

For the LTSpice model the RF source should be a voltage source. In the loop design - like the MFJ quarter wavelength loop matching boxes - there are two capacitors. No series cap.
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JAHAM2BE
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« Reply #5 on: November 26, 2014, 06:19:20 AM »

For the LTSpice model the RF source should be a voltage source.

Do you think you might post a screenshot of your recommended LTspice circuit and the simulation results? I'm still a little unclear on the best way to analyze the impedance of a capacitively-matched small loop antenna in LTspice.
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